Mode of work
Full-time
Experience
Mid
Employment type
Permanent
Location
On-site
Expertise & Skills
Job description
About the Role
This position is within the MME MCU/MPU Digital IP team. We develop best-in-class digital IPs for NXP’s automotive and advanced microcontroller businesses, delivering sensor and processing technologies that enable secure, connected vehicles today and autonomous vehicles of the future.
Job Summary
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Define and execute verification plans
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Develop and implement verification testbenches
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Develop testbench components such as drivers, monitors, and scoreboards, and leverage advanced UVM VIPs
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Develop directed and constrained-random stimulus
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Analyze RTL, functional coverage, and assertion coverage results
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Define and develop functional coverage models
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Develop and maintain SystemVerilog assertions (SVA)
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Apply formal verification methodologies
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Demonstrate strong debugging skills, including failure reproduction and root-cause analysis
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Exhibit strong analytical and problem-solving skills; familiarity with major simulation and debug tools is a plus
Key Responsibilities
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Drive a “zero-defect” mindset across the verification team
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Provide technical leadership and guidance on complex verification challenges
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Mentor and grow a small team of engineers
Cross-Functional Collaboration
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Partner with local and global SoC and IP teams to drive best practices and continuous productivity improvements
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Demonstrate outstanding problem-solving and analytical capabilities
Qualifications
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BSEE with 8+ years of semiconductor industry experience, or
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MSEE with 5+ years of experience, or
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PhD with 3+ years of experience
Technical Skills
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Knowledge of protocols such as DDR, PCIe, AMBA (CHI, ACE, AXI)
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Strong expertise in Verilog, SystemVerilog (VHDL is a plus)
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Experience with OVM/UVM and class-based verification methodologies
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Experience with formal verification methodologies
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Experience leveraging AI/LLM-based approaches to improve engineering efficiency
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Test pattern debugging and validation on simulation and automated test environments
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Low-power verification using CPF/UPF
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Scripting in Python, Perl, and UNIX/Linux
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Experience with FPGA/emulation/prototyping platforms (e.g., HAPS, Palladium, Zebu) is a plus
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Understanding of power management concepts
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Familiarity with functional and code coverage methodologies
Location
Austin, TX (Hybrid)
More information about NXP in the United States...
NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.
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